Kennedy Caisley

Hello! I'm a PhD student at the University of Bonn, where I work on high-framerate CMOS sensors for radiation imaging. I'm also quite nerdy about open-source chip design tools. I'm a part of the SiLab research group; advised by Jochen Dingfelder.

Kennedy Caisley

Chips

FRIDA chip layout

FRIDA-1

65 nm CMOS · Submitted 2025

Array of compact 12-bit 10 Msps SAR ADCs under 2500 µm² at ~10 fJ/conv-step, to enable >100 kfps readout of >1 Mpixel image sensors. Majority designed with open EDA tools.

FRIDA 130A chip layout

FRIDA-0

130 nm CMOS · Designed 2025

Prototype to verify IHP Open130-G2 PDK and OpenROAD tooling, with ADC fabric and SPI control. Further development planned, and potential free MPW submission.

BigRock chip die photo

BigRock

28 nm CMOS · Submitted 2022

17-channel hybrid pixel readout front-end with 22 ps LSB TDC, <100 e⁻ noise CSA at 5.4 µW per channel, and 70 ps RMS time-of-arrival resolution at 3 ke⁻ input.

Calypso chip die photo

Calypso

65 nm CMOS · Submitted 2021

8-channel front-end for diamond and silicon particle detectors: 1.12 ns peaking time, <25 ps RMS jitter, ±6 ps time-walk over 30 dB dynamic range, 225 Mrad tolerant.